The invention is in the field of transistor amplifier circuits, and relates more particularly to power amplifier circuits suitable for use in nigh-frequency applications.
Analog power amplifier circuits (as distinct from Class E or switching circuits) used in high-frequency applications are typically operated in Class A, AB, B, C, or F, with the active component being operated as an analog amplifier over the selected conduction angle. Such power amplifiers have been used in wireless communications apparatus and have been designed in both GaAs MOSFET and deep-submicron CMOS technology.
In such power amplifiers, the signal swing at the drain of the output transistor can typically be as much as three times the power supply voltage. This imposes a limitation on the maximum supply voltage that can be used to avoid gate-drain breakdown in MOS transistors. Thus, for example, in a 0.25 micron CMOS process, the nominal supply voltage is 2.5 volts. However, a 2.5 volt Class B amplifier cannot be designed in this process, as the gate breakdown voltage is 6 volts. In conventional cascode-configured amplifiers, where one transistor is in a common-source configuration and the other is in a common-gate configuration, with the common-gate transistor having a constant dc gate voltage and the gate being essentially at ground at the operating frequency, the breakdown problem is reduced but not eliminated.
Although various prior-art techniques exist for improving circuit performance using series-connected transistors and bootstrapptng techniques, as shown in U.S. Pat. Nos. 3,268,827; 4,100,438; 4,284,905; and 4,317,055, these references do not address the issue of how to maximize usable power supply voltage in cascode analog power amplifier circuits. Accordingly, it would be desirable to have a cascode power amplifier circuit in which power output is not limited by operating the output stage at less than he nominal supply voltage due to component breakdown restraints.
It is therefore an object of the invention to provide a cascode analog power amplifier circuit in which the useable power supply voltage is maximized, so that power output is not limited by voltage constraints imposed by component breakdown characteristics.
In accordance with the invention, this object is achieved by a new analog power amplifier circuit in a cascode bootstrapped configuration in which a first MOSFET and a second MOSFET are connected in series and coupled between a dc voltage source terminal and a common terminal, with an rf input signal terminal being coupled to a gate electrode of the first MOSFET and a dc control voltage terminal being coupled to a gate electrode of the second MOSFET. In order to provide a bootstrapping effect, a unidirectionally-conducting element is coupled between a drain electrode and the gate electrode of the second MOSFET, and an output of the amplifier circuit is taken from the drain electrode of the second MOSFET.
In a preferred embodiment of the invention, the dc control voltage source terminal is coupled to the gate electrode of the second MOSFET by a resistor, and the rf input signal terminal is coupled to the gate electrode of the first MOSFET by a capacitor.
In a further preferred embodiment of the invention, the unidirectionally-conducting element is a diode-connected MOSFET, which implements the bootstrapping effect.
In yet a further preferred embodiment of the invention, a resistor is coupled in series with the unidirectionally-conducting element.
A cascode bootstrapped analog power amplifier circuit in accordance with the present invention offers a significant improvement over prior-art analog power amplifiers in that the useable power supply voltage is maximized to achieve substantially increased power output.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.